python2verilog.backend package

Subpackages

• python2verilog.backend.verilog package
  • Submodules
  • python2verilog.backend.verilog.ast module
    • Always
      • Always.to_lines()
    • AtNegedge
    • AtNegedgeStatement
    • AtPosedge
    • AtPosedgeStatement
    • BlockingSub
    • Case
      • Case.to_lines()
    • CaseItem
      • CaseItem.to_lines()
    • Declaration
      • Declaration.to_lines()
    • IfElse
      • IfElse.to_lines()
    • Initial
      • Initial.to_lines()
    • Instantiation
      • Instantiation.to_lines()
    • LocalParam
    • Module
      • Module.to_lines()
    • NonBlockingSubsitution
    • PosedgeSyncAlways
    • Statement
      • Statement.get_blocked_comment()
      • Statement.get_inline_comment()
      • Statement.to_lines()
    • Subsitution
      • Subsitution.to_lines()
    • TypeDef
      • TypeDef.to_lines()
    • While
      • While.to_lines()
  • python2verilog.backend.verilog.codegen module
    • CodeGen
      • CodeGen.get_module()
      • CodeGen.get_module_lines()
      • CodeGen.get_module_str()
      • CodeGen.get_testbench()
      • CodeGen.get_testbench_lines()
      • CodeGen.get_testbench_str()
  • python2verilog.backend.verilog.config module
    • CodegenConfig
      • CodegenConfig.add_debug_comments
    • TestbenchConfig
      • TestbenchConfig.random_ready
  • python2verilog.backend.verilog.fsm module
    • FsmBuilder
      • FsmBuilder.create_quick_done()
      • FsmBuilder.do_edge()
      • FsmBuilder.do_vertex()
      • FsmBuilder.get_case()
      • FsmBuilder.new_caseitem()
  • python2verilog.backend.verilog.module module
    • Module
      • Module.make_start_ifelse()
  • python2verilog.backend.verilog.testbench module
    • Testbench
  • Module contents

Module contents

Backend